Course Description

EEE102 is a course targeting electrical and computer engineering students to build the fundamental digital design and experimentation concepts. In this course we will study the combinational logic circuit design techniques, sequential logic circuits, registers and counters, memory, and state machines. In parallel to lectures we will develop experimental skills studying various digital design techniques during our laboratory hours. Our experimental setup will be based on Field Programmable Gate Array (FPGA) structure, and we'll experienceschematic and hardware description language (HDL) design tools.

(This description is obsolute) EEE 102 is

Academic Dishonesty

The students taking this course are expected to submit their own work in all midterms, projects, homeworks and in class quizes. Please be aware that, being a part of a dishonest plot intentionally (for example, helping others cheat, doing others' homeworks or lab work, giving your reports to others) will also be considered as cheating. Disciplinary acts will be taken for the students who are involved in academic dishonesties, and they will not be offered any voluntary compensation.

Lecture Regulations

Students should attend all lectures. There will not be any form of make-ups for in-class quizes.
Students who are late more than 15 minutes will not take in-class quizes.
Disruptive talking, cell phone use, walking in&out during the lecture, eating&drinking and any kind of distraction to the lecture will not be allowed during the lecture.